In the simplest type of these devices, setting both inputs to one or zero – depending on the construction - is forbidden because it would result in logical inconsistency. Feeding the outputs of two of these devices into a multiplexer creates a larger type of them that is triggered by both rising and falling clock edges. Several of these devices are cascaded together in a shift register. The simplest type of these devices is built around two cross-coupled (*) NOR or NAND gates in a positive feedback loop. Their outputs are labeled Q and Q-bar, (10[1])and their subtypes include the JK, D, and SR. Unlike the similar latch, these devices are enabled by a clock signal. For 10 points, name these digital logic circuits whose name derives from their ability to toggle between two (10[1])stable states. ■END■