In the simplest type of these devices, setting both inputs to one or zero – depending on the construction - is forbidden because it would result in logical inconsistency. (15[2])Feeding the outputs of two of these devices into a multiplexer (15[1])creates a larger type of them that is triggered by both rising and falling (15[1])clock edges. (15[1])Several of these devices are cascaded together in a shift register. (15[3])The simplest type of these devices is built around two cross-coupled (-5[1])(*) NOR or NAND gates in a positive feedback loop. Their outputs are labeled Q and Q-bar, (10[2])and their subtypes include the JK, D, and SR. (10[1])Unlike the similar latch, these devices are enabled by a clock signal. For 10 points, name these digital logic circuits whose name derives from their ability to toggle between (10[2])two (10[3])stable states. ■END■