In the simplest type of these devices, setting both inputs to one or zero – depending on the construction - is forbidden because it would result in logical inconsistency. (15[1])Feeding the outputs of two of these devices into a multiplexer creates a larger type of them that is triggered by both rising and (-5[1])falling clock edges. Several of (15[1])these devices are cascaded together in a shift register. (15[3])The simplest type of these devices is built around two cross-coupled (-5[1])(*) NOR (10[1])or NAND gates in a (10[1])positive feedback loop. (10[2])Their (-5[1])outputs are labeled Q and (10[2])Q-bar, and their subtypes include the JK, (10[1])D, and SR. (10[1])Unlike the similar latch, these devices are enabled by a clock (10[1])signal. For 10 points, name these (10[1])digital logic circuits whose name derives from their ability to toggle between two (10[1])stable states. ■END■