Question

To make certain uncommon events “precise,” these devices sequentially retire the contents of an ROB (“R-O-B”). One unsuccessful design invented for these devices co-located their inputs in “very long words” to extract ILP. These devices employ dynamic scheduling and eliminate anti-dependencies by using reservation stations in Tomasulo's algorithm. Write-back is the last of five (10[1])concurrently executing pipeline stages in early devices of this kind from the RISC (“risk”) family. (10[1])The simplest (10[1])of these devices process their inputs in a loop consisting of fetch, decode, and execute stages. (-5[1])These devices expose an interface called the instruction set architecture, whose examples include MIPS (“mips”) and x86 (“X-eighty-six”). For 10 points, (-5[1])what devices run general purpose machine code and are designed (-5[1])by Arm and Intel? ■END■ (10[2]0[5])

ANSWER: CPUs [or central processing units; accept CPU cores; accept (computer) microprocessors; prompt on cores by asking “cores of what devices?”; prompt on SoCs or systems on a chip or system-on-chips by asking “what components of an SoC?”; prompt on computers; reject “(integrated) circuits” or “ICs”; reject “chips”] (Reorder buffers are used to implement precise exceptions. VLIW and Tomasulo’s algorithm aim to maximize instruction-level parallelism.)
<Other Science>
= Average correct buzz position

Summary

2023 ACF Winter @ Columbia11/11/2023Y863%0%38%84.40

Buzzes

PlayerTeamOpponentBuzz PositionValue
Dylan Epstein-Gross (DII)Princeton AColumbia B5210
Richard NiuCornell CRutgers B6610
Albert ZhangColumbia AVassar6810
Anirudh BharadwajPenn APenn B84-5
Ethan FurmanHaverfordYale C103-5
Ashish KumbhardareRowan ABard A113-5
Rico-ian BantingNYU BNYU A1180
Eshan PantNYU ANYU B1180
Srikar VenkatesanPenn BPenn A11810
Cyrus HodgsonBard ARowan A11810
Peter NelsonYale CHaverford1180
Ben SterlingYale APrinceton B1180
Jupiter DingPrinceton BYale A1180